Multiple-disk reflected binary encoder



Nov. 10, 1964 M. zlsERMAN MULTIPLE-DISK REFLECTED BINARY ENCODER 2 Sheets-Sheet 1 Filed Nov. 27, 1959 Y R. M W Q *N5 Il Rm N Q m Ni QQ N M Q /E y N. m v@ .Sm Vt w 17m n u WQ NWT IIN \m\ om ow M Mk ,\0||I.||\ E m IIL Si H H @Q Mn nu@ V NQ NE). v omo n Vlllll QQwl'h-LIIL Humm u w MMT: Y k2 ONO vm; ,m m QQLMHVE A .am NNY. 1 Y S SC wk mk ---i m, mi SQ IVLIEIrI; L Q .HERMANS mm Q N U Nllmmwlwn U It N G ik @m ||L S9 wvwww\m All Ov www 1.. i.: I JSWN H m S ..V. 1|..|I. I. I IQ KQ /II/ @1 l@ O m N W m N, Om. N

Nov. 10, 1964 M. zlsERMAN MULTIPLE-msx REFLECTED BINARY ENcoDER 2 Sheets-Sheet 2 Filed NOV. 27, 1959 United States Patent O 3,156,911 IslULTlELE-DISK REFLEC ED BINARY ENCDER Martin Ziserman, Hartsdale, NY., assignor to United Aircraft Corporation, East Hartford, Conn., a corporation of Delaware Filed Nov. 27, 1959, Ser. No. 855,740 10 Claims. (Cl. 340-347) My invention relates to a multiple-disk reilected binary encoder and more particularly to an analogue-to-digital converter which provides an unambiguous count in the reflected binary code on a plurality of reduction-geared pattern disks.

In the prior art it has been appreciated that the capacity of encoders may be greatly increased by the provision of a plurality of reduction-geared pattern disks. The maximum count is increased by a factor which is equal to the gear ratio used. This has created the problem of eliminating ambiguities due to backlash in the gear reduction train and due to uncertainty in the locations of the transfer points between the various elements of the patterns. In converters of the prior art employing but a single disk, it has been found expedient to eliminate ambiguity problems by employing the reflected binary code. This code is also termed cyclic binary and Gray. In the reflected binary, cyclic binary, or Gray code only one digit changes polarity at each transfer point. In order to eliminate ambiguities in a multiplepattern reflected binary encoder, the prior art has proposed the conversion of the rellected binary count into a natural binary count. The conversion of count from one code into another requires considerable external logic equipment which is both expensive and unreliable because of electronic complexity.

One object of my invention is to provide a high capacity encoder having a large maximum count in the reflected binary code by the provision of a plurality of reductiongeared pattern disks.

Another object of my invention is to provide a multipledisk encoder providing a reflected binary count without ambiguity due either to backlash in the reduction gearing or to uncertainty in the precise locations of elements of the pattern occasioned by normal manufacturing tolerances in construction.

A further object of my invention is to provide a multiple-disk reliected binary encoder which provides an unambiguous count without the necessity of converting the reiiected binary count into a natural binary count.

Still a further object of my invention is to provide a multiple-disk unambiguous retiected binary encoder of inexpensive construction and reliable operation.

Other and further objects of my invention will appear from the following description.

In general my invention contemplates the provision of a high speed disk having the conventional reflected binary or Gray code pattern. All bits generated by the pattern are directly employed to produce the output representation except the most significant bit. The most significant bit is used to generate a pair of complementary signals of opposite polarity or condition such that when one represents a l the other represents a and vice versa. I also provide a low speed disk which is coupled by reduction gearing to the high speed disk. The two complementary signals representing what would ordinarily be the most signiiicant bit of the high speed disk are coupled to the pattern of the low speed disk. The alternate stepping action of the pair of complementary signals coupled to the low speed disk increases the tolerances and eliminates ambiguities in the low speed pattern bits.

In the accompanying drawings which form part of the instant specication and which are to be read in conlatented Nov. 10, 1964 junction therewith and in which like reference numerals are used to indicate like parts in the various views:

FlGURE l is a developed schematic view of a iirst embodiment of my invention in which the low speed disk comprises a number of electrically isolated circles corresponding to the number ot bits generated by the low speed pattern.

FIGURE 2 is a developed schematic view of a second embodiment and preferred embodiment of my invention in which the low speed disk comprises a pair of electrically isolated patterns each of which is similar to the high speed pattern.

Referring more particularly now to` FIGURE l, the high speed pattern comprises four circles of elements indicated generally by the reference numerals It), Ztl, 3l), and 4i?. Circle Il! is provided with eight conductive segments and eight nonconductive intersegmental spaces. Circle 2t? is provided with four conductive segments and four intersegmental spaces. Circle 3l) is provided with two segments and two spaces. And circle 46 is provided with one segment and one space. All of the conductive elements of circles l@ through di?" are connected to a common slip ring which is contacted by a brush 2. Brush 2 is connected to a source of positive input excitation voltage l. The high speed pattern has a maximum capacity of 32 comprising the counts Q, l, g, nli, IQ, l1, Q Q, Q, and l as indicated by the underlined numerals. The high speed pattern is mounted on a nonconductive disk which is shown cut radially along C-C and developed. Line C-C is located at the midpoint of the count or" 1Q. Brushes lo, Z6, 3e, and 46 are radially aligned and disposed to Contact alternately the segments and spaces of circle ltl, 2d, 39, and 4t?, respectively. Brush 56 is disposed to contact alternately the segment and space of circle iti and is disposed 90 from brush 46. Brushes I6, 26, 36, and 46 are connected to output terminals it, 23, 33, and 4S, respectively. Brush 56 is connected to a terminal 58. The low speed pattern comprises electrically isolated circles 1li), 12), 13), 140, and tt?. Circle llt) comprises eight segments and eight spaces. Circle l2@ comprises four segments and four spaces. Circle I3@ comprises two segments and two spaces. And each of circles 140 and 3.5i) comprises one segment and one space. The segments of circle are connected to a common slip ring which is contacted by a brush 116. The segments of circle 12d are connected to a common slip ring which is contacted by brush 126. The segments of circle 139 are connected to a common slip ring which is contacted by a brush 14.36. The segment of circle 14@ is connected to a slip ring which is contacted by a brush 14e. And the segment of circle 15d is connected to a slip ring which is contacted by a brush E56. The maximum capacity of the encoder considering both high and low speed disks is 32x24. The low speed pattern provides the counts CX24, 1x24,

. 15x24, 16x24, 17 24, 30 24, and 31x24, as indicated by the underlined symbols. Circles llt) through 1S@ are mounted on a nonconductive disk which is shown cut radially along line D-D and developed. Line Dl) is located at the midpoint of the count of 16x24. The high speed and low speed disks are connected by reduction gearing 5 such that sixteen revolutions of the high speed disk are required to produce one revolution of the low speed disk. The low speed pattern thus counts half revolutions of the high speed pattern. Brushes lle, E26, 135, 146, and 156 are connected to output terminals 11S, T425, 1355, lli-8, and 153, respectively. Terminal 53 is connected to the input of an inverter 59 which should have a low output impedance. The output of inverter 59 is complementary to its input 3 appearing at terminal When terminal 58 is a positive potential equal to that at terminal l, by virtue that brush 56 contacts the segment of circle 10, the output of inverter 59 should rest at ground representing a 0. When terminal 5S rests at ground representing a 0, by virtue that brush 5o lies inthe space of circle 40, the output of inverter 59 should be a positive potential equal to that supplied at terminal 1. Terminal 5S is connected forwardly through a crystal 111 to a brush 114. The output of inverter 59 is connected forwardly through a crystal 112 to a brush 113. Brushes llrand 114i are disposed to contact the segments of circle 110. riferminal 5S is also connected forwardly through a crystal 121 to a brush 123, forwardly through a crystal 131 to a brush 133, forwardly through a crystal 141 to a brush 143, and forwardly through a crystal 151 to a brush 153. The output of inverter 59 is also connected forwardly through a crystal 1.22 to a brush 121i, forwardly through a crystal 132. to a brush 13d, forwardly through a crystal 14i2 to a brush 141i, and forwardly through a crystal 152 to a brush 154i. Brushes 123 and 124 are disposed to Contact the segments of circle 120; brushes 133 and 134 are dis posed to contact the segments of circle 130; brushes 143 and 14d are disposed to Contact alternately the segment and space of circle 140; and brushes 153 and 154; are disposed to contact alternately the segment and space of circle 150. Brushes 113 and 114i are spaced apart half the length of arc subtended by a segment or space of circle 110. Pairs of brushes 123 and 124, 133 and 13d, 143 and 145, and 153 and 154i have the same spacing as the pair of brushes 113 and 114. Thus each pair of brushes has a spacing of l@ revolution or 11.25.

lf only a single pattern were used, the signal at terminal 55 would represent the most significant digit; and this would be the next more signicant digit than the signal at output terminal d3. However, for a plurality of patterns, the next more significant digit than the signaly at output terminal i3 appears at output terminal 11S. Hence in a muliplepattern encoder, the most signicant digit (terminal 58) of the high speed pattern is lost and is replaced by the least significant digit (terminal 11S) of the low speed pattern. rl`he low speed pattern counts in increments of 24:16, while the capacity of the high speed pattern is apparently 25:32. The loss of the bit at terminal 58 reduces the capacity of the encoder from an apparent value of 32x25 to an actual value of 32x24, but creates a `redundancy which enables the elimination of ambiguities. The low speed pattern counts half revolutions of the high speed disk representing increments of 24:16. Thus when the high speed pattern is between the counts of Q and 15, the count of the low speed disk is an even number of increments of 24; and when the high speed pattern is between the counts of 1 and 31, the

. count of the low speed disk is an odd number ofnincrements of 24.

The encoder is shown at the recycling point, where the count of the high speed disk changes from 1 to Q and the count of the low speed disk changes from 31 24 to x24. At the recycling point the representation changes from 511 to 0. The reilected binary representation of 511 is 100,000,000. At the recycling point brushes 153 and 154 symmetrically straddle a transfer point of circle 150. If brush d contacts the segment of circle d0, then a signal is impressed. on terminal 53 which is coupled through crystal 151 to brush 153. Since brush 155 contacts the segment of circle 150, a l will appear at output terminal 152i. Now let us consider that the patterns move to the left under the staionary brushes. Brush 55 will immediately break Contact with the segment of circle 40, causing conduction to shift from lagging brush 153 to leading brush 154;. Since brush lies in the space of circle 150, output terminal S drops to ground representing a 0; and the output representation changes from 511 to 0. Upon the rotation of the high speed disk through one-quater revolution, the low speed disk rotates through 1,54 revolution. Leading brush 11e contacts a segment of circle and lagging brush 1.53 breaks contact with the segment of'circle 150. Butv since neither of brushes 111i or 153 carries a signal, the output representation remains unchanged. Upon the rotation of the high speed disk through one-half revolution from the position shown, the low speed disk rotates through 1&2 revolution. Brushes 113 and 114i now symmetrically straddle a transfer point ofk circle 110; and brushSlfs contacts the segment of circle 40. Conduction shifts from lagging brush 113 to leading brush 111i. Since brush 114 contacts a segment of circle 110, the output at terminal 113 becomes positive representing a 1. Upon the rotation of the high speed disk through three-quarters revolution from the position shown, the low speed disk rotates through fyi-,4 revolution..

Lagging brush 113 contacts a segment of circle 110; and leading brush 124i contacts a segment of circle 125. But since neither of brushes 113 or 124 carries a signal, Ythe output representation remains unchanged. Upon the rotation of the high speed disk through one revolution from the position shown, the low-,speed disk rotates through 1/16 revolution. Brushes 123 and 12d now symmetrically straddle a transfer point of circle and brush Se breaks contact with the segment of circle d0. Conduction shiftsV from lagging brush 123 to leading brush 124i. Since brush 12d contacts a segment of circle 120, the output at 'terminal 125 becomes positive representing a 1. Half of the transfer points of the low speed disk are accommodated by circle 110. The remaining half of the transfer points of the low speed disk are accommodated by circles '120 through 150. The various transfer points of circle 110 alternate with those of circles 120 through 150. lt will be noted that the connections to input brushes 113 and 11d of circle 110 are of opposite polarity to the connections to the pairs of input brushes of circles 120 through 150. At the low-speed transfer point between the counts of 31 24 and 0x24, conduction shifts from lagging brush 153 to leading brush 154i, while simultaneously shifting from leading brush 114i to lagging brush 113. At the lowspeed transfer point between the counts of 0 24 and 1x24, conduction shifts from lagging brush 113 to leading brush 114, while simultaneously shifting from leading brush 154 to lagging brush 153 and Vfrom leading brush 124i to lagging brush 123. At the transfer point between the counts of 1 24 and 2x24, conduction shifts from lagging brush 123 to leading brush 124, while simultaneously shifting from leading brush 11d to lagging brush 113. Thus the count of the low speed'disk is changed each time brush 56 breaks contact or makes contact with the segment of circle d0. Whenever brush 5e makes contact with the segment of circle 40, the change in count is produced by circle 110. vWllenever brush 56 breaks Contact with the segment of circle 40, the change in count is produced by one of circles 120 through 150.

Referring now to FIGURE 2, the high speed disk and the disposition of the brushes and the connection of the brushes to the output terminals and the arrangement of segments and spaces in the pattern are identical to FIG- URE l. In FIGURE 2, however, the low speed disk comprises a first group of circles 110, 120, 130, and 1410 all connected to a common slip ring which is contacted by a brush 102 and a second group of circles 210, 220, 230,

and 240 al1 connected to a common slip ring which is.

216, 126, 136, and 146 are radially aligned. Brush 156 is disposed to contact alternately the segment and space of circle 1d@ and is displaced 90 from brush 146. The group of brushes comprising brushes 116, 226, 236, and 246 are radially aligned. Brush 256 is disposed to contact alternately the segment and space of circle 2456 and is displaced 90 from brush 246. The two groups of brushes are spaced apart half the length of arc subtended by a segment or a space of circle 11i! or circle 210. Thus the pair of brushes 116 and 216 have a spacing of 1/32 revolution or 11.25; and the pair of brushes 126 and 226 have a similar spacing; and the pair of brushes 156 and 256 are likewise spaced apart by 11.25. Brushes 116 and 216 are connected forwardly through respective crystals 117 and 217 to output terminal 11S; brushes 126 and 226 are connected forwardly through respective crystals 127 and 227 to output terminal 12S; brushes 136 and 236 are connected forwardly through respective crystals 137 and 237 to output terminal 133; brushes 136 and 2456 are connected forwardly through respective crystals 147 and 247 to output terminal 14d; and brushes 156 and 2.56 are connected forwardly through respective crystals 157 and 257 to output terminal 15S. The first group of circles 110 through 1d@ are mounted on one side of a nonconductive disk; and the second group of circles 21) through 2d() are mounted on the opposite side of the disk. This disk, carrying similar patterns on opposite sides, is shown cut radially along line D-D and developed. The two patterns on opposite surfaces of the disk are shown rotated 90 in opposite directions about line F representing the periphery of the disk, in order that both patterns may be simultaneously presented in a developed View.

The encoder is again shown at the recycling point where the count of the high speed disk changes from to Q and the count of the low speed disk changes from 3l 2L1 to OXZL. At the recycling point brushes 156 and 256 symmetrically straddle corresponding and radially aligned transfer points of circles 14d and 24d, respectively. if brush 56 contacts the segment of circle di?, then a signalv is impressed on terminal and on brush 162, energizing the tirst group of circles 110 through 14d. Since brush 156 contacts the segment of circle 140, a signal is coupled forwardly through crystal 157 to output terminal 15S, producing a 1 thereat. As the patterns move to the left under the stationary brushes, brush 56 immediately breaks contact with the segment of circle 4t?, causing terminal 53 and brush 102 to drop to ground potential. When the input of inverter 59 drops to ground potential, its output changes from ground to a positive potential equal to that supplied at terminal 1. rihus conduction shifts from brush 162 to brush 262, de-energizing the rirst group of circles 110 through 14u and energizing the second group of circles 21() through 2dr?. Since leading brush 256 lies `within the space of circle 240, output terminal 15S drops to ground potential representing a 0; and the output representation changes from 511 to O. Upon onequarter revolution of the high speed disk, the low speed disk rotates through 1/64 revolution. Leading brush 116 contacts a segment of circle 110; and lagging brush 156 breaks contact with the segment of circle lett. But since the iirst group of circles 11d through 14d is not energized, the output representation remains unchanged. Upon the rotation of the high speed disk through one-half revolution from the position shown, the low speed disk rotates through 1/32 revolution. Brushes 116 and 216 now symmetrically straddle corresponding and radially aligned transfer points of circles 11i) and 21d, respectively; and brush 56 contacts the segment of circle el?. Conduction shifts from the second group of circles 21@ through 241B to the iirst group of circles 116 through 14). Since brush 116 contacts a segment of circle 110, a positive signal is coupled forwardly through crystal 117 to terminal 11d, representing a 1 thereat. Upon the rotation of the high speed disk through three-t uarters revolution from the position shown, the low speed disk rotates through 3/64 revolution'. Lagging brush 216 contacts a segment of circle 21d; and leading brush 226 contacts a segment of circle 22d. But since the second group of circles 210 through 24@ is not energized, the output representation remains unchanged. Upon the rotation of the high speed disk through one revolution from the position shown, the low speed disk rotates through 1/16 revolution. Brushes 126 and 226 symmetrically straddle corresponding and radially aligned transfer points of circles 120 and 220, respectively; and brush 56 breaks contact with the segment of circle 46. Conduction shifts from the rst group of circles through 14d tothe second group of circles 210 through 240. Since brush 226 contacts a segment of circle 224), a signal is coupled forwardly through crystal 227 to output terminal 128, representing a l thereat. Half of the transfer points of the low speed disk are accommodated by circles 11d and 210. The remaining half of the transfer points of the low speed disk are accommodated by circles 121i through 146 and 220 through 243. The Various transfer points of circles 110 and 21) alternate with those of circles through 140 and 220 through 2do. it will be noted that the alignment of brushes 116 and 216 of circles 110 and 21@ is of opposite polarity to that of the brushes of circles 121i through 14d and 22() through 2411i. At the low speed transfer point between the counts of 3 l 24 and OX 24, conduction shifts from the first group l 24, conduction shifts from the second group of circles associated with lagging brush 216 and leading brush 256 and leading brush 226 to the first group of circles associated with leading brush 116 and lagging brush 156 and lagging brush 126. At the transfer point between the counts of l 24 and 2x24, conduction shifts from the first group of circles associated with lagging brush 126 and leading brush 116 to the second group of circles associated with leading brush 226 and lagging brush 216. rThe count of the low speed disk is again, as in FIGURE 1, changed each time brush 56 breaks contact or makes Contact with the segment of circle 4t). Whenever brush 56 makes contact with the segment of circle du, the change in count is produced by circles 11u and 21h. Whenever brush 56 breaks contact with the segment of circle all, the change in count is produced by one of circles 121i through le@ and the corresponding one of circles 22) through 240. rl`he provision of the OR circuit crystals 117 through 157 and 217 through 257 prevents the simultaneous energization of both groups of circles.

It will be appreciated that the two groups of circles of the low speed disk may be mounted on opposite sides as described or alternatively may be mounted on the same side concentrically or may be mounted on separate disks mounted for common rotation on the same shaft.

While I have shown an equal number of segments for the high speed and low speed disks, it will be appreciated by those skilled in the art that I may provide more segments and spaces on the high speed disk than on the low speed disk.

It will be noted that in the high speed patterns of FIG- URES l and 2 and in the low speed pattern of FIGURE 2, circles 40 and also the pair of circles 149 and 2514i provide two digits by the 90 disposition of brushes 56 and also the pair of brushes 156 and 256.

In the low speed disk of FIGURE 1, I must provide three brushes for the generation of each bit. Since in FIG- URE l the low speed disk provides live bits, there are ifteen brushes. In the low speed disk of FIGURE 2, I need provide only two brushes for the generation of each bit plus the two additional input brushes lill and 102. Thus in FGURE 2, for the generation ofthe tive low speed bits, l need provide only twelve brushes, rather than the fifteen required for the low speed disk in FIGURE 1.

As the number of low s eed bits is increased, the reduction in the number of brushes becomes more significant.

For the low speed disk in FlGURE l, there are `ve circles and five slip rings which comprise a total of ten tracks. Furthermore there must be some spacing between the circlesin order to permit of electrical isolation. There are four bands of insulation between the five circles. These insulating bands however may be small compared with the radial Width of a track. If, for the low speed'disk in FIGURE 2, both groups of circles were concentrically mounted on the same side, a total of ten tracks would again be required; eight of the tracks would accommodate circles and the two additional tracks would accommodate slip rings. Thus both in FIGURE 1 and in FlG- URE 2 the total numberrof low speed tracks required is the same. However, in FlGURE 2 only one insulating band is required to separate the two groups of circles. rlfhe radial width of the low speed disk of FGURE 2, even with bothV groups of circles mounted onthe same side, will be less than that of the low speed disk of FIGURE by three insulating bands. Furthermore, since in FlGURE 2 the pattern of each of the two groups of circles of the low speed disk may be identical to that of the high speed disk, the cost of construction will be reduced. Hence the embodiment of my invention shown in FIGURE 2 is to be preferred'.

lt Will be appreciated by those skilled in the art that if it is desired to provide a three-speed encoder then the outputs at terminals 15S in FlGURES 1 and 2 may be used to generate the least significant digit of a third pattern, reduction-geared to the second pattern, in a similar manner to that in which the outputs at terminals 5S are employed to generate the outputs at terminals liti.' ln such event the outputs at terminals d would be lost in order to create a redundancy which would eliminate ambiguities for such third pattern disk. The pattern of the third disk may be identical to either of the low speed patterns of FGURES l and 2. The capacity of the encoder would be increased then by a factor of 16 from 512 to 8,182. The reduction gearing between the low speed disk in PEG- URES 1 and 2 and such third disk would again be 16-to-1.

lt will be seen that l have accomplished the objects of my invention. My encoder has a high capacity; and the maximum count may be increased without limit by the appropriate provision of additional reduction-geared pattern disks. My multiple disk encoderprovides a reflected binary count without ambiguity despite the usual uncer tainties of manufacturing tolerances. My encoder is of inexpensive construction, especially in the embodiment' of FIGURE 2. My encoder is reliable in operation because of the elimination of ambiguities without electronic complerity.

lt will be understood that contain features and subcombinations are of utility and may be employed Without reference to other features and subcombinations. This is contemplated by and is within the scope of my claims. lt is further obvious that various changes may be made in details within the scope of my claims without departing from the spirit of my invention. it is, therefore, to be understood that my invention is not to be limited to the specific details shown and described.

Having thus described my invention, what l claim is:

1. A multiple-pattern reflected binary encoder including in combination, a first rotatable member, means including means mounted on the first member for providing a reflected binary count containing a plurality of digits and having a most significant digit, said reflected binary count means comprising a circular segment subtending 180 and a pair of signal sensing devices disposed in 90 phase-displaced signal-sensing relationship with the circular segment, one sensing device providing said most significant digit and the other sensing device providing neXt-to-most significant digit, means responsive only to said most significant digit for providing a pair of complementary signals, a second rotatable member,

g5 reduction gearing means interconnecting the rst and second members, the rotational speed of the second member being less than that of the first member, generating means mounted on the second member, means coupling' the pair of complementary signals to thel generating means, and means responsive to the generating means for` providing a least significant output bit having the same significance as said most significant digit.

2. A multiplepattern reiiected binary encoder including in combination a first rotatable member, means including mounted on the first member for providing a reiiected binary count containing a plurality of digits and having a most significant digit, means responsive only to said most significant digit for providing a pair of complementary signals, a second rotatable member, reduction gearing means interconnecting the first and second members, the rotational speed of the second member being less than that of the first member by an even whole number factor, generating means including circularly disposed means mounted on the second member and a first a second signal coupling device, the first and second devices being disposed in phase-displaced signalcoupling relationship with the circular means, the rst and second devices having a phase displacement equal to 360 divided by twice said factor of gear reduction, means coupling the pair of complementary signals to the gen erating means, one signal being associated only with the tirst of the coupling devices and the other signal being associated only with the second of the coupling devices,

means responsive to the generating means for providing a least significant output bit having the same significance as said most signicantdigit.

3. A multiple-pattern reiiected binary encoder including in combination a first rotatable member, means including means mounted on the first member for providing a reflected binary count containing a plurality of digits and having a most significant digit, said reflected binary count means comprising a circular segment subtending 180 and a pair of signal sensing devices disposed in 90 phase-displaced signal-sensing relationship with the circular segment, one sensing device providing said most significant digit and the other sensing device providing a next-to-most significant digit, means responsive only to said most significant digit for providing a pair of complementary signals, a second rotatable member, reduction gearing means interconnecting the first and second members, the rotational speed of the second member being less than that of the first member, first Vgenerating means including circularly disposed first means mounted on the second member and a first and a second signal coupling device, second generating means including circularly disposed second means mounted on the second member and a third and a fourth signal coupling device, the yfirst and second circularly disposed means being electrically isolated, the firstand second devices being disposed in phase-displaced signal-coupling relationship with the first circular means, the third yand fourth devices being disposed in phase-displaced signal-coupling rela tionship-with the second circular means, means coupling the pair of complementary signals to the first and second generating means, and means responsive to the first and second generating means for providing at least significant output bits having the same significance as said most signicant digit and an output bit of gerater significance.

4. A. multiple-pattern reflected binary encoder including in combination a first rotatable member, means including means mounted on the first member for providing a reiiected binary county containing a plurality of digits and having a most significant digit, means responsive only to said most significant digit for providing a pair of com plementary signals, a second rotatable member, reduction gearing means interconnecting the first and second members, the rotational speed of the second member being less than that of the first member by an even whole number factor, first generating means including circularly disposed rst means mounted on the second member and a first and a second signal coupling device, the first and second devices being disposed in phase-displaced signalcoupling relationship with the rst circular means, the first and second devices having a predetermined phase displacement equal to 360 divided by twice said factor of gear reduction, second generating means including circularly disposed second means mounted on the second member and a third and a fourth signal coupling device, the third and fourth devices being disposed in phasedisplaced signal-coupling relationship With the second Cir' cular means, the third and fourth devices having said predetermined phase displacement, the first and second circularly disposed means being electrically isolated, means coupling the pair of complementary signals to the first and second generating means, and means responsive to the first and second generating means for providing a least significant output bit having the same signicance as said most significant digit and an output bit of greater significance.

5. A multiple-pattern reliected binary encoder including in combination a first rotatable member, means including means mounted on the first member for providing a reflected binary count containing a plurality of digits and having a most significant digit, means responsive only to said most significant digit for providing a pair of cornplementary signals, a second rotatable member, reduction gearing means interconnecting the rst and second members, the rotational speed of the second member being less than that of the lirst member, a first circle comprising an electrically conductive segment mounted on the second member, a second circle comprising an electrically conductive segment mounted on the second member, the first and second circles being electrically isolated, a first and a second signal coupling device disposed in phase-displaced signal-coupling relationship Witli the first circle, a third and a fourth signal coupling device disposed in phase-displaced signal-coupling relationship with the second circle, for one direction of rotation of the second member the phase of the first device leading that of the second device and the phase of the third device lagging that of the fourth device, means coupling one of the complementary signals to the first and third devices, means coupling the other of the complementary signals to the second and fourth devices, means responsive to the first circle `for providing a least significant output bit having the saine significance as said most significant digit and means responsive to the second circle for providing an output bit of greater signicance.

6. A multiple-pattern reflected binary encoder including in combination a first rotatable member, means including means mounted on the first member for providing a reflected binary count containing a plurality of digits and having a most significant digit, means responsive only to said most signicant digit for providing a pair of complementary signals, a second rotatable member, reduction gearing means interconnecting the first and second members, the rotational speed of the second member being less than that of the first member by an even Whole number factor, a first circle comprising at least one electrically conductive segment mounted on the second member, the number of first circle segments being equal to half said factor of gear reduction, a second circle comprising an electrically conductive segment mounted on the second member, the first and second circles being electrically isolate, a first and a second signal coupling device disposed in phase-displaced signal-coupling relationship With the first circle, the first and second devices having a predeterined phase displacement equal to 360 divided by twice said factor of gear reduction, a third and a fourth signal coupling device disposed in phase-displaced signal-coupling relationship with the second circle, the thirdand fourth devices having said predetermined phase displacement, for one direction of rotation of the second member the phase of the rst device lagging that of the second device and the phase of the third device leading that of the fourth device, means including a first pair of unilateral impedances for coupling one of the complementary signals to the rst and third devices, means including a second pair of unilateral impedances for coupling the other of the complementary signals to the second and fourth devices, means responsive to the lirst circle for providing a least signicant output bit having the same significance as said most significant digit, and means responsive to the second circle for providing an output bit of greater signicanoe.

7. A multiple-pattern reflected binary encoder including in combination a first rotatable member, means including means mounted on the first member for providing a reilected binary count containing a plurality of digits and having a most -signicant digit, means responsive only to said most significant digit `for providing a pair of complementary signals, a second rotatable member, reduction gearing means interconnecting the first and second niembers, the rotational speed of the second member being less than that of the first member, a first circle comprising at least one electrically conductive segment mounted on the second member, a second circle comprising at least one electrically conductive segment mounted on the second member, the first and second circles having equal numbers of segments, the first and second circles being electrically isolate, means coupling one of the complementary signals only to the first circle, means coupling the other of the complementary signals only to the second circle, a first signal sensing device disposed in signal-sensing relationship with the first circle, a second signal sensing device disposed in a relatively phase displaced signalsensing relationship with the second circle, and means responsive to the rst and second devices for providing a least significant output bit having the same significance as said most significant digit.

8. A multiple-pattern reflected binary encoder including in combination a first rotatable member, means including means mounted on the first member for providing a reflected binary count containing a plurality of digits and having a most significant digit, means responsive only to said most significant digit for providing a pair of cornplementary signals, a second rotatable member, eduction caring means interconnecting the first and second members, the rotational speed of the second member being less than that of the first member by an even whole number factor, a first electrically conductive circular segment mounted on the second member, a second electrically conductive circular segment mounted on the second member, the first and second segments being similar and electrically isolate and each subtending 180, means coupling one of the complementary signals only to the rst segment, means coupling the other of the complementary signals only to the second segment, a first and a second signal sensing device disposed in phase-displaced signal-sensing relationship with the first segment, the first and second devices having a phase displacement of a third and `a fourth signal sensing device disposed in phase-displaced signal-sensing relationship with the second segment, the third and fourth devices having a phase displacement of 90, the first and third devices having a predetermined relative phase displacement equal to 360 divided by twice said factor of gear reduction, the second and four-th devices having said predetermined relative phase displacement, means responsive to the first and third devices for providing a most significant bit output, and means responsive to the second and fourth devices for providing a neXt-tO-most significant bit output.

9. A multiple-pattern reflected binary encoder including in combination a first rotatable member, means including means mounted on the first member `for providing a reflected binary count containing a plurality of digits and having a most sigiiicant digit, means responsive only to said most significant digit for providing a pair of complementary signals, a second rotatable member, reduction lll gearing means interconnecting the iirst ,id second members, the rotational speed of the second member being less than that of the first member, a iirst circle comprising at least one electrically conductive segment mounted on the second member, a second circle comprising at least one electrically conductive segment mounted on the second member, the first and second circles having equal numbers of segments, 111e first and second circles being electrically isolate, a first electrically conductive circular segment mounted on the secondmember, a second electrically conductive circular segment mounted on Vthe second member, the rst and second circular segments being electrically isolate, the first circle and the lirst circular segment being electrically connected, the second circle and the second circular segment being electrically connected, means coupling one of the complementary signals only to the first circle and the rst circular segment, means coupling the other of the complementary signals only to the second circle and the second circular segment, a first signal sensing device disposed in signal-sensing relationship with the tirst circle, a second signal sensing device disposed in a relatively phase displaced signal-sensing relationship with the econd circle, a third signal sensing device disposed in signal-sensing relationship with the Erst circular segment, a fourth signal sensing device disposed in a relatively phase-displaced signal-sensing relationship with the second circular segment, for one direction of rotation of the second member the phase of the first device leading that of the second device and 'the phase of the third device lagging that ci the fourth device, means responsive to the third and fourth devices for providing a most signicant output bit, and means responsive to the lirst and second devices for providing a least significant output bit having the same significance as said most-significant digit.

l0. A multiple-pattern reflected binary encoder including in combination a rst rotatable member, means including means mounted on the lirst member forV providing a reflected binary count containing a plurality of digits and having a most significant digit, means responsive only to said most significant digit for providing a pair of complementary signals, a second rotatable member, reduction gearing means interconnecting the first and second members, the rotational speed of the second member being less than that of the iirst member by an even whole number factor at least equal to four, a first circle comprising a number of electrically conductive segments mounted on the second member, a second circle comprising an equal number of electrically conductive segments mounted on the second member, the number of segments of each of the first and second circles being equal to half said factor of gear reduction, the first and second CII sassari circles being similar and electrically isolate, a first electrically conductive circular segment. mounted on the second member,y a second electrically conductive circular segment mounted on the second member, the iirst and second circular segments being electrically isolate and each subtending 180, the first circle and the lirst circular segment being electrically connected, the second circle and the second circular segment being electrically connected, means coupling one of the complementary'signals only to the first circle and the first circular segment, means coupling the other of the complementary signals only to the second circle and the second circular segment, a first signal sensing device disposed in signal-sensing,relationship with the first circle, a second signal sensing device disposed in a relatively phase-displaced signal-schein g relationship with the second circle, the rst and second devi es having a predetermined relative phase-displacement equal to 360 divided by twice said factor of gear rcduction, a third and a fourth signal sensing deivce disposed in phase-displaced signal-sensing relationship with the' rst circular segment, the third anfl fourth devices iaving a phase displacement of a fifth and a sixth signal sensing device disposed in phase-displaced signal-- sensing relationship with the second circular segment, the fifth and sixth devices having a phase displacement i 90, the third and ith devices having said predetermined relative phase displacement, the fourth and sixth devices having said predetermined relative phase displacement, for one direction of rotation of the second member the phase of the first device leading that of the second device and the phase of the third device lagging that of the filth device and the phase of the fourth device lagging that of the sixth device, means responsive to the fourth and sixth devices and including a first pair of unilateral impedances for providing a most signitieant bit output, means responsive tothe third and fifth devices and including a second pairV of unilateral impedances for providing a next-to-most signicant bit output, and means responsive to the first and second devices and including a third pair o unilateral impedances for providing a least significant bit output having the same signiiicance as said most significant digit.

References Cited in the le of this patent UNITED STATES PATENTS 

10. A MULTIPLE-PATTERN REFLECTED BINARY ENCODER INCLUDING IN COMBINATION A FIRST ROTATABLE MEMBER, MEANS INCLUDING MEANS MOUNTED ON THE FIRST MEMBER FOR PROVIDING A REFLECTED BINARY COUNT CONTAINING A PLURALITY OF DIGITS AND HAVING A MOST SIGNIFICANT DIGIT, MEANS RESPONSIVE ONLY TO SAID MOST SIGNIFICANT DIGIT FOR PROVIDING A PAIR OF COMPLEMENTARY SIGNALS, A SECOND ROTATABLE MEMBER, REDUCTION GEARING MEANS INTERCONNECTING THE FIRST AND SECOND MEMBERS, THE ROTATIONAL SPEED OF THE SECOND MEMBER BEING LESS THAN THAT OF THE FIRST MEMBER BY AN EVEN WHOLE NUMBER FACTOR AT LEAST EQUAL TO FOUR, A FIRST CIRCLE COMPRISING A NUMBER OF ELECTRICALLY CONDUCTIVE SEGMENTS MOUNTED ON THE SECOND MEMBER, A SECOND CIRCLE COMPRISING AN EQUAL NUMBER OF ELECTRICALLY CONDUCTIVE SEGMENTS MOUNTED ON THE SECOND MEMBER, THE NUMBER OF SEGMENTS OF EACH OF THE FIRST AND SECOND CIRCLES BEING EQUAL TO HALF SAID FACTOR OF GEAR REDUCTION, THE FIRST AND SECOND CIRCLES BEING SIMILAR AND ELECTRICALLY ISOLATE, A FIRST ELECTRICALLY CONDUCTIVE CIRCULAR SEGMENT MOUNTED ON THE SECOND MEMBER, A SECOND ELECTRICALLY CONDUCTIVE CIRCULAR SEGMENT MOUNTED ON THE SECOND MEMBER, THE FIRST AND SECOND CIRCULAR SEGMENTS BEING ELECTRICALLY ISOLATE AND EACH SUBTENDING 180*, THE FIRST CIRCLE AND THE FIRST CIRCULAR SEGMENT BEING ELECTRICALLY CONNECTED, THE SECOND CIRCLE AND THE SECOND CIRCULAR SEGMENT BEING ELECTRICALLY CONNECTED, MEANS COUPLING ONE OF THE COMPLEMENTARY SIGNALS ONLY TO THE FIRST CIRCLE AND THE FIRST CIRCULAR SEGMENT, MEANS T COUPLING THE OTHER OF THE COMPLEMENTARY SIGNALS ONLY TO THE SECOND CIRCLE AND THE SECOND CIRCULAR SEGMENT, A FIRST SIGNAL SENSING DEVICE DISPOSED IN SIGNAL-SENSING RELATIONSHIP WITH THE FIRST CIRCLE, A SECOND SIGNAL SENSING DEVICE DISPOSED IN A RELATIVELY PHASE-DISPLACED SIGNAL-SENSING RELATIONSHIP WITH THE SECOND CIRCLE, THE FIRST AND SECOND DEVICES HAVING A PREDETERMINED RELATIVE PHASE-DISPLACEMENT EQUAL TO 360* DIVIDED BY TWICE SAID FACTOR OF GEAR REDUCTION, A THIRD AND FOURTH SIGNAL-SENSING DEVICE DISPOSED IN PHASE-DISPLACED SIGNAL-SENSING RELATIONSHIP WITH THE FIRST CIRCULAR SEGMENT, THE THIRD AND FOURTH DEVICES HAVING A PHASE DISPLACEMENT OF 90*, A FIFTH AND A SIXTH SIGNAL SENSING DEVICE DISPOSED IN PHASE-DISPLACED SIGNALSENSING RELATIONSHIP WITH THE SECOND CIRCULAR SEGMENT, THE FIFTH AND SIXTH DEVICES HAVING A PHASE DISPLACEMENT OF 90*, THE THIRD AND FIFTH DEVICES HAVING SAID PREDETERMINED RELATIVE PHASE DISPLACEMENT, THE FOURTH AND SIXTH DEVICES HAVING SAID PREDETERMINED RELATIVE PHASE DISPLACEMENT, FOR ONE DIRECTION OF ROTATION OF THE SECOND MEMBER THE PHASE OF THE FIRST DEVICE LEADING THAT OF THE SECOND DEVICE AND THE PHASE OF THE THIRD DEVICE LAGGING THAT OF THE FIFTH DEVICE AND THE PHASE OF THE FOURTH DEVICE LAGGING THAT OF THE SIXTH DEVICE, MEANS RESPONSIVE TO THE FOURTH AND SIXTH DEVICES AND INCLUDING A FIRST PAIR OF UNILATERAL IMPEDANCES FOR PROVIDING A MOST SIGNIFICANT BIT OUTPUT, MEANS RESPONSIVE TO THE THIRD AND FIFTH DEVICES AND INCLUDING A SECOND PAIR OF UNILATERAL IMPEDANCES FOR PROVIDING A NEXT-TO-MOST SIGNIFICANT BIT OUTPUT, AND MEANS RESPONSIVE TO THE FIRST AND SECOND DEVICES AND INCLUDING A THIRD PAIR OF UNILATERAL IMPEDANCES FOR PROVIDING A LEAST SIGNIFICANT BIT OUTPUT HAVING THE SAME SIGNIFICANCE AS SAID MOST SIGNIFICANT DIGIT. 